DTA-2125 25G SmartNIC Optimized for SMPTE 2110 Perfect for writing SMPTE-2110 applications in software, handling up to two UHD or ten (5 Rx + 5 Tx) full HD streams, fully uncompressed.
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Key Characteristics
Ports | 1x 25G/10G SFP+ |
Optimized for | SMPTE 2110 SMPTE 2022-5/6 |
Hardware pipes | 5x Receive, 5x Transmit |
PCIe Label | Low-profile PCIe Gen3 x8 |
Networking
25G Ethernet | IEEE 802.3ae |
SFP+ | SFF-8431* |
IP protocol | IPv4, IPv6 |
VLAN | IEEE 802.1Q |
*Direct attach cables are not supported
SMPTE 2110
ST 2110-10 | System timing model |
ST 2110-20 | Uncompressed video |
ST 2110-21 | Video traffic shaping |
ST 2110-30 | Uncompressed audio |
ST 2110-31 | AES3 audio |
ST 2059-1/2 | Use of PTP in SMPTE 2110 |
You can use raw mode with PTP synchronization to implement any SMPTE 2110 substandard.
SMPTE 2022
ST 2022-1 | IP FEC for TS-over-IP |
ST 2022-2 | TS-over-IP |
ST 2022-5 | IP FEC for SDI-over-IP |
ST 2022-6 | SDI-over-IP |
PC Support
Linux | ≥4.x, 5.x |
Windows | 10, 11; Server 19, 22 |
Processor | Core i7 Or equivalent AMD CPU |
Additional Resources
SMPTE 2110 Coding Examples
Explore the AvFifo API examples to kick-start your programming with the DTA-2125.
AvFifo is part of DekTec's DTAPI SDK
for crafting custom applications.
DekTec Software
StreamXpress | Generate SMPTE-2125 and TS-over-IP test streams |
StreamXpert | Analyze/view SMPTE-2110 and TS-over-IP streams |
DTAPI | SDK for DekTec devices with AvFifo API. Use it to create DTA-2110 applications. |
Pricing
DTA-2125 | € | 975 | Stock: 25+ |
25G SmartNIC for PCIe with SMPTE 2110 and SMPTE 2022-5/6 hardware acceleration. |
DTA-2125-SLP | € | 1.215 | Stock: 25+ |
25G SmartNIC optimized for SMPTE 2110 with StreamXpert Lite and StreamXpress player software. |
DTA-2125-SXP | € | 2.341 | Stock: 25+ |
25G SmartNIC optimized for SMPTE 2110 with StreamXpert analyzer and StreamXpress player software. |
Prices exclude applicable sales tax, shipping charges and customs duties. Quantity discounts may be available, please request a quotation.
Features
Applications
Block Diagram
Outlined below is the block diagram of the DTA-2125's firmware, organized into two pathways: transmission (upper section) and reception (lower section).
The transmission path incorporate three hardware pipes that directly interface with the user application, resulting in excellent performance. Packets from these hardware pipes are multiplexed with those from the software pipes and the standard network stack. A scheduler ensures that each packet is transmitted precisely according to its PTP timestamp.
Conversely, the receive path also integrates 5 hardware pipes directly interfaced with the user application. All remaining packets are dispatched to a software router. This router channels real-time AV streams to the software pipes, while normal standard network traffic is forwarded to the conventional network stack.
Related Products
DTA-2110 – 10G SmartNIC Optimized for SMPTE 2110 10G SmartNIC with the same architecture as the DTA-2125. |
DTA-2125 Bird's Eye View